Semiconductor Manufacturing

High probability of defect, high unit costs and high production volume combine to threaten profitability in semiconductor manufacturing. See how our AI-powered solution can reduce defects and process downtime

Virtual metrology on plasma etching machine

Context:

In semiconductor manufacturing, the scale and intensity of operations requires a very tight monitoring of machines and a very stringent maintenance plan. Plasma etching machines, for instance, are maintained monthly.

​Problematic:

Before releasing production on these machines, a series of test has to be conducted. Best Case scenario, the production can be restarted after 15-20 hours.

Solution:
We are developing a solution to predict the results of those tests from the machine parameters and the physical characteristics of the chamber in order to allow an immediate release of production after the maintenance is done
.

Deployment / Implementation:
We can implement this solution in c.3 months.

Root Cause Analysis on Chemical Vapor Deposition

Context:

CVD is a complex process involving the deposition of a nanoscopic layer on a wafer. The quality of this process is measured at end of line through an electrical test, but at this stage, defects are much more expensive than at the beginning of the line, leading manufacturers to implement in-line tests to try and anticipate the quality of the wafer.

Problematic:

It is not possible to perform an electrical test in-line, therefore manufacturers tend to use mechanical tests to anticipate defects, yet their predictability over the final test is very low.

Solution:

We developed a solution to identify in the CVD process data the most common deviations leading to a failed end-of-line electrical test

that helps engineers locate the issue and define new, more efficient in-line testing protocols.

Deployment / Implementation:
We can implement this solution in c.3 months.

Data Driven Wafer Testing Strategy

Context:

After a process that is particular critical, or after a sequences of processes a test is run on the wafers. The wafers are processed in batches of 25 elements and usually a percentage of them, 10% to 40%, is tested afterward.

Problematic:

The wafer to be tested are usually randomly chosen from the batches of 25. This is a risk because often bad wafers are not selected for the test,which implies:

  1. Bad wafers passing a test.

  2. Delay in recognizing that a machine is not working properly.

Solution:

We develop a software that takes in input the parameters of the machines that processes the

wafer and outputs the probability that the wafer would pass the next quality test. In this way the operator can choose to test just the wafers with a low probability to pass the quality test.

Deployment / Implementation:
We can implement this solution in c.3 months.